Two Bit-Serial Architectures for Check Node Update in Min-Sum Decoding of LDPC Codes

Hu Qing, He Xuan, Luo Lisha, Cai Kui, Tang Xiaohu

China Communications
China Communications ›› 2026, Vol. 23 ›› Issue (3) : 142-150. DOI: 10.23919/JCC.fa.2024-0690.202603
COMMUNICATIONS THEORIES & SYSTEMS

Two Bit-Serial Architectures for Check Node Update in Min-Sum Decoding of LDPC Codes

    {{javascript:window.custom_author_en_index=0;}}
  • {{article.zuoZhe_EN}}
Author information +
History +

HeighLight

{{article.keyPoints_en}}

Abstract

{{article.zhaiyao_en}}

Key words

Cite this article

EndNote

Ris (Procite)

Bibtex

Download Citations
{{article.zuoZheEn_L}}. {{article.title_en}}. {{journal.qiKanMingCheng_EN}}. 2026, 23(3): 142-150 https://doi.org/10.23919/JCC.fa.2024-0690.202603

References

Publishing order | Descend order by publishing year | Descend order by cited within

References

{{article.reference}}

Funding

RIGHTS & PERMISSIONS

{{article.copyrightStatement_en}}
{{article.copyrightLicense_en}}

Accesses

Citation

Detail
Sections
Recommended

/

〈 〉